RTL is dealing with the idea of data flow between registers and the logical operations performed on it between registers. We can begin to think of specific models for creating RTL processes like the datapath and controller model.

The RTL design process generally involves specifying:

• What the registers are
• What gets transferred between these registers
• What logic gets applied to these transfers

The Controller, often implemented as a Finite State Machine (FSM), is responsible for the "control flow" or the sequence of operations. It generates the control signals/inputs that dictate how data should move or be processed within the datapath. The FSM is great for this role because it excels at sequence-based tasks, deciding what action should be taken next based on the current state and possibly some inputs.

The Datapath, on the other hand, contains the actual logic and storage elements (like registers, arithmetic logic units, multiplexers, etc.) that perform the computational tasks. When the controller says, "Add A and B," the datapath is where A and B are actually located, and it is where the addition happens.

Clarity: Separation makes it easier to understand the system. The datapath does the actual "work," such as arithmetic operations, while the controller directs the datapath, telling it what work to do when.

High-Level State Machine vs FSM

In your example of a soda dispenser, a high-level state machine (HLSM) is used instead of a finite state machine (FSM) because an HLSM allows for more complexity. While FSMs deal primarily with boolean states and simple transitions, HLSMs can:

• Handle multi-bit data inputs and outputs (e.g., a and s).
• Utilize local registers (e.g., tot).
• Perform complex arithmetic and logical operations (e.g., tot=0, tot<s, tot=tot+a).

HLSMs offer a more expressive framework for describing complex systems, which makes them suitable for describing the RTL behavior of more complicated digital circuits.

So we would like to keep the FSM model for the controller, but outsource the complex logic on the state of the values in datapath. Datapath also stores the values, but the controller is the brain of the operations, making decisions based on the data from the datapath.

See how tot is a local register we keep track of in the datapath, then we receive results like tot<s from the datapath because its complex logic, and the FSM only receives single bit results.